Memory is one type of integrated circuitry, and is used in computer systems for storing data. An example memory is DRAM (dynamic random-access memory). DRAM cells may each comprise an access transistor in combination with a capacitor. The DRAM cells may be arranged in an array; with wordlines extending along rows of the array, and digit-lines extending along columns of the array. The wordlines may be coupled with the access transistors of the memory cells. Each memory cell may be uniquely addressed through a combination of one of the wordlines with one of the digit-lines.
The wordlines may be proximate channel regions of the access transistors, and may gatedly induce current flow along the channel regions. Regions of the wordlines along the access transistors may be considered to correspond to transistor gates. Each of the access transistors may be characterized by a threshold voltage (VT), which is the minimum gate-to-source voltage which will induce current flow along the channel region of the transistors. Ideally, all of the access transistors within a memory array will have identical VT, but such is generally not practical due to limitations of existing processes. Instead, the access transistors are fabricated to have VT within a suitable range.
Generally, VT is adjusted by providing suitable dopant (e.g., boron) within semiconductor material of transistor channel regions to suitable concentration to generate the desired VT within the transistor channel regions. However, as channel regions are scaled to increasing smaller (thinner) dimensions with increasing levels of integration, it is becoming increasingly difficult to adjust VT with dopant implants. One of the problems is that the dopant levels are so low with small-dimension-channel-regions that minor variations in doping can lead to large changes in VT, leading to unacceptable variation of VT across a memory array; and, in some cases, pushing too many of the access devices outside of acceptable tolerances.
It is desirable to develop new approaches for adjusting VT, new architectures suitable for utilizing the new approaches, and new methods for forming suitable architectures.